In applications of semiconductor power devices, the device's size and heat dissipation are two important parameters. To improve thermal performance, thinner semiconductor wafer is used and large area is exposed out of the package without increasing the size of the devices. Conventional semiconductor devices use the exposure of source or drain to improve heat dissipation.
FIG. 1 and FIG. 2 are cross-sectional and perspective views of an existing semiconductor device, in which the gate 110 and source 120 of a semiconductor chip 100 are located at the top of the semiconductor chip 100 and connect to pins 151, 152 respectively through solder balls 140. The drain 130 located at the bottom of the semiconductor chip 100 is directly exposed from the molding compound 160. The exposed area of the drain 130 can be the whole bottom surface of molding compound 160, as shown in FIG. 2, or can be a part of bottom surface of molding compound 160, as shown in FIG. 1. In this device, only the surface of drain 130 is exposed for heat dissipation.
FIG. 3 is a cross-sectional schematic view of another existing semiconductor device. In this device, drain 130 of a flipped chip 100 is connected to a heat sink 170 that is exposed from the top surface of the molding compound 160. The gate and source of flipped chip 100 are connected correspondingly to pins 191, 192 through solder balls 140. The bottom of pins 191, 192 is exposed from the molding compound 160, which improves the thermal performance.
However, the process of manufacturing of the existing devices is very complicated.